10718 search results - page 171 / 2144 » On the Circuit Implementation Problem |
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BIBE
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract-The aim of this work is to compare some deterministic optimization algorithms and evolutionary algorithms on parameter estimation in a biological circuit design problem: t...
132
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ASPDAC
2004
ACM
15 years 9 months ago
2004
ACM
With the exponential reduction in the scaling of feature size, inter-wire coupling capacitance becomes the dominant part of load capacitance. Two problems are introduced by coupli...
120
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DAC
2000
ACM
15 years 8 months ago
2000
ACM
This paper develops the noise-counterparts to familiar delay formulas like Elmore or PRIMO. By matching the first few moments of the network’s transfer impedance, we obtain effi...
133
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DATE
1999
IEEE
15 years 8 months ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
104
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DATE
1998
IEEE
15 years 8 months ago
1998
IEEE
1 Redundancy removal is an important step in combinational logic optimization. After a redundant wire is removed, other originally redundant wires may become irredundant, and some ...