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» On the Circuit Implementation Problem
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145
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ICCAD
1993
IEEE
121views Hardware» more  ICCAD 1993»
15 years 8 months ago
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
Arjan J. van Genderen, N. P. van der Meijs
153
Voted
NIPS
1992
15 years 5 months ago
Silicon Auditory Processors as Computer Peripherals
Several research groups are implementing analog integrated circuit models of biological auditory processing. The outputs of these circuit models have taken several forms, includin...
John Lazzaro, John Wawrzynek, Misha Mahowald, Mass...
ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
15 years 7 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
15 years 8 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert
GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
15 years 8 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja