10718 search results - page 1883 / 2144 » On the Circuit Implementation Problem |
171
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SIGCOMM
2010
ACM
15 years 6 months ago
2010
ACM
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...
236
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ICECCS
2010
IEEE
15 years 6 months ago
2010
IEEE
Abstract—Cheddar is a framework dedicated to the specification of real-time schedulers, and to their analysis by simulation. It is developed in Ada. Some parts of its modular ar...
183
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EUROPAR
2010
Springer
15 years 6 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
208
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FPGA
2010
ACM
15 years 6 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
279
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ADHOC
2008
15 years 6 months ago
2008
Energy efficiency and positional accuracy are often contradictive goals. We propose to decrease power consumption without sacrificing significant accuracy by developing an energy-...