10718 search results - page 1972 / 2144 » On the Circuit Implementation Problem |
135
Voted
HPCA
2007
IEEE
16 years 5 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
140
Voted
HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
118
Voted
HPCA
2005
IEEE
16 years 5 months ago
2005
IEEE
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...
131
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HPCA
2001
IEEE
16 years 5 months ago
2001
IEEE
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
132
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CHI
2003
ACM
16 years 5 months ago
2003
ACM
In evaluations of text entry methods, participants enter phrases of text using a technique of interest while performance data are collected. This paper describes and publishes (vi...