10718 search results - page 202 / 2144 » On the Circuit Implementation Problem |
108
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DFT
2007
IEEE
15 years 10 months ago
2007
IEEE
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
143
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ISQED
2007
IEEE
15 years 10 months ago
2007
IEEE
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
137
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ISCAS
1999
IEEE
15 years 8 months ago
1999
IEEE
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
116
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CTRSA
2008
Springer
15 years 6 months ago
2008
Springer
In the 1980s, Yao presented a very efficient constant-round secure two-party computation protocol withstanding semi-honest adversaries, which is based on so-called garbled circuits...
264
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DAC
2011
ACM
14 years 4 months ago
2011
ACM
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...