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» On the Circuit Implementation Problem
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ISPD
2004
ACM
120views Hardware» more  ISPD 2004»
15 years 10 months ago
On optimal physical synthesis of sleep transistors
Considering the voltage drop constraint over a distributed model for power/ground (P/G) network, we study the following two problems for physical synthesis of sleep transistors: t...
Changbo Long, Jinjun Xiong, Lei He
DATE
2000
IEEE
85views Hardware» more  DATE 2000»
15 years 8 months ago
Gate Sizing Using a Statistical Delay Model
This paper is about gate sizing under a statistical delay model. It shows we can solve the gate sizing problem exactly for a given statistical delay model. The formulation used al...
E. T. A. F. Jacobs, Michel R. C. M. Berkelaar
ECCC
2006
90views more  ECCC 2006»
15 years 4 months ago
Comparing Reductions to NP-Complete Sets
Under the assumption that NP does not have p-measure 0, we investigate reductions to NP-complete sets and prove the following: (1) Adaptive reductions are more powerful than nonad...
John M. Hitchcock, Aduri Pavan
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
15 years 10 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
IPPS
2005
IEEE
15 years 10 months ago
Possibilities to Solve the Clique Problem by Thread Parallelism using Task Pools
We construct parallel algorithms with implementations to solve the clique problem in practice and research their computing time compared with sequential algorithms. The parallel a...
Holger Blaar, Thomas Lange, Renate Winter, Marcel ...