10718 search results - page 233 / 2144 » On the Circuit Implementation Problem |
130
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GLVLSI
2003
IEEE
15 years 10 months ago
2003
IEEE
- A current-mode logic (CML) buffer is based on a simple differential circuit. This paper investigates important problems involved in the design of a CML buffer as well as a chain ...
160
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CONCUR
2001
Springer
15 years 9 months ago
2001
Springer
Bounded model checking has been recently introduced as an efficient verification method for reactive systems. In this work we apply bounded model checking to asynchronous systems....
138
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EH
1999
IEEE
15 years 9 months ago
1999
IEEE
High-level analog circuit design is a complex problem domain in which evolutionary search has recently produced encouraging results. However, little is known about how to best str...
121
Voted
DFT
1997
IEEE
15 years 9 months ago
1997
IEEE
Crosstalk has become a major issue in VLSI design due to the high frequency, long interconnecting lines and small spacing between interconnects in today's integrated circuits...
131
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JSA
2000
15 years 4 months ago
2000
As the density of VLSI circuits increases it becomes attractive to integrate dedicated test logic on a chip. This Built-in Self-Test (BIST) approach not only offers economic benef...