This paper introduces the implementation of the Iterative Symmetry Indices Decomposition (ISID) for the synthesis of ternary threedimensional logic circuits. The synthesis of regu...
We prove that the weighted monotone circuit satisfiability problem has no fixed-parameter tractable approximation algorithm with constant or polylogarithmic approximation ratio un...
This paper brings together a selection of creative circuit designs and ideas that Charles Molnar devised while working at Sun Microsystems Laboratories. The circuits offer fast im...
rder logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, ...
Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified app...