Sciweavers

10718 search results - page 47 / 2144
» On the Circuit Implementation Problem
Sort
View
ASYNC
2005
IEEE
90views Hardware» more  ASYNC 2005»
15 years 3 months ago
SEU-Tolerant QDI Circuits
This paper addresses the issue of Single-Event Upset (SEU) in quasi delay-insensitive (QDI) asynchronous circuits. We show that an SEU can cause abnormal computations in QDI circu...
Wonjin Jang, Alain J. Martin
DAGSTUHL
2007
14 years 11 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed eï¬...
John O'Donnell
NN
2008
Springer
152views Neural Networks» more  NN 2008»
14 years 9 months ago
Compact silicon neuron circuit with spiking and bursting behaviour
A silicon neuron circuit that produces spiking and bursting firing patterns, with biologically plausible spike shape, is presented. The circuit mimics the behaviour of known class...
Jayawan H. B. Wijekoon, Piotr Dudek
CORR
2008
Springer
118views Education» more  CORR 2008»
14 years 10 months ago
A Logic Programming Framework for Combinational Circuit Synthesis
Abstract. Logic Programming languages and combinational circuit synthesis tools share a common "combinatorial search over logic formulae" background. This paper attempts ...
Paul Tarau, Brenda Luderman
ICCAD
1994
IEEE
80views Hardware» more  ICCAD 1994»
15 years 1 months ago
Macromodeling of analog circuits for hierarchical circuit design
{ Hierarchy plays a signi cant role in the design of digital and analog circuits. At each level of the hierarchy it becomes essential to evaluate if a sub-block design is feasible ...
Jianfeng Shao, Ramesh Harjani