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DAC
2005
ACM
14 years 11 months ago
Asynchronous circuits transient faults sensitivity evaluation
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
Yannick Monnet, Marc Renaudin, Régis Leveug...
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
15 years 4 months ago
CMOS Control Enabled Single-Type FET NASIC
A new hybrid CMOS-nanoscale circuit style has been developed that uses only one type of Field Effect Transistor (FET) in the logic portions of a design. This is enabled by CMOS pro...
Pritish Narayanan, Michael Leuchtenburg, Teng Wang...
KES
1998
Springer
15 years 2 months ago
Insect vision based motion detection
The architectural and circuit design aspects of a mixed analog/digital very large scale integration (VLSI) motion detection chip based on models of the insect visual system are des...
X. T. Nguyen
TCAD
1998
107views more  TCAD 1998»
14 years 9 months ago
Optimizing dominant time constant in RC circuits
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
Lieven Vandenberghe, Stephen P. Boyd, Abbas A. El ...
64
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CEC
2005
IEEE
15 years 3 months ago
Parallel evolutionary algorithms on graphics processing unit
Evolutionary Algorithms (EAs) are effective and robust methods for solving many practical problems such as feature selection, electrical circuits synthesis, and data mining. Howeve...
Man Leung Wong, Tien-Tsin Wong, Ka-Ling Fok