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» On the Circuit Implementation Problem
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IJBC
2006
49views more  IJBC 2006»
15 years 3 months ago
Bifurcation Analysis of a Circuit-Related Generalization of the Shipmap
In this paper a three-parameter bifurcation analysis of a piecewise-affine map is carried out. Such a map derives from a well-known map which has good features from its circuit im...
Federico Bizzarri, Marco Storace, Laura Gardini
103
Voted
DATE
2006
IEEE
98views Hardware» more  DATE 2006»
15 years 9 months ago
Test generation for combinational quantum cellular automata (QCA) circuits
— In this paper, we present a test generation framework for testing of quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted significant recent at...
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
103
Voted
ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 7 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
CCL
1994
Springer
15 years 7 months ago
Application of Constraint Logic Programming for VLSI CAD Tools
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
Renate Beckmann, Ulrich Bieker, Ingolf Markhof
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
16 years 3 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...