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» On the Circuit Implementation Problem
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DATE
2005
IEEE
87views Hardware» more  DATE 2005»
15 years 9 months ago
Concurrent Error Detection in Asynchronous Burst-Mode Controllers
We discuss the problem of Concurrent Error Detection (CED) in a popular class of asynchronous controllers, namely Burst-Mode machines. We first outline the particularities of the...
Sobeeh Almukhaizim, Yiorgos Makris
116
Voted
ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
15 years 9 months ago
Technology Mapping for Reliability Enhancement in Logic Synthesis
Abstract— Reliability enhancements are traditionally implemented through redundancies at the system level or through the use of harden-cell-designs at the circuit level. Reliabil...
Zhaojun Wo, Israel Koren
ANCS
2005
ACM
15 years 9 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...
ISTCS
1993
Springer
15 years 7 months ago
Analog Computation Via Neural Networks
We pursue a particular approach to analog computation, based on dynamical systems of the type used in neural networks research. Our systems have a xed structure, invariant in time...
Hava T. Siegelmann, Eduardo D. Sontag
CHES
2006
Springer
152views Cryptology» more  CHES 2006»
15 years 7 months ago
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
Daisuke Suzuki, Minoru Saeki