In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
Recent work by Bernasconi, Damm and Shparlinski showed that the set of square-free numbers is not in AC0 , and raised as an open question whether similar (or stronger) lower bound...
Cai and Selman [CS99] defined a modification of Levin’s notion of average polynomial time and proved, for every P-bi-immune language L and every polynomial-time computable dis...