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ETS
2007
IEEE
94views Hardware» more  ETS 2007»
15 years 4 months ago
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
15 years 4 months ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
ODBIS
2007
Springer
150views Database» more  ODBIS 2007»
15 years 4 months ago
An Effective SPARQL Support over Relational Databases
Supporting SPARQL queries over relational databases becomes an active topic recently. However, it has not received enough consideration when SPARQL queries include restrictions on...
Jing Lu, Feng Cao, Li Ma, Yong Yu, Yue Pan
SEMWEB
2007
Springer
15 years 3 months ago
Who the FOAF knows Alice? A Needed Step Toward Semantic Web Pipes
In this paper we take a view from the bottom to RDF(S) reasoning. We discuss some issues and requirements on reasoning towards effectively building Semantic Web Pipes, aggregating...
Christian Morbidoni, Axel Polleres, Giovanni Tumma...
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
15 years 3 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer