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» On the Complexity of SAT
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INDOCRYPT
2010
Springer
14 years 7 months ago
Algebraic, AIDA/Cube and Side Channel Analysis of KATAN Family of Block Ciphers
Abstract. This paper presents the first results on AIDA/cube, algebraic and sidechannel attacks on variable number of rounds of all members of the KATAN family of block ciphers. Ou...
Gregory V. Bard, Nicolas Courtois, Jorge Nakahara,...
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
15 years 10 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
ESA
2009
Springer
129views Algorithms» more  ESA 2009»
15 years 4 months ago
Constant Ratio Fixed-Parameter Approximation of the Edge Multicut Problem
Abstract. The input of the Edge Multicut problem consists of an undirected graph G and pairs of terminals {s1, t1}, . . . , {sm, tm}; the task is to remove a minimum set of edges s...
Dániel Marx, Igor Razgon
TASE
2008
IEEE
15 years 4 months ago
Bounded Model Checking of Compositional Processes
Verification techniques like SAT-based bounded model checking have been successfully applied to a variety of system models. Applying bounded model checking to compositional proce...
Jun Sun 0001, Yang Liu 0003, Jin Song Dong, Jing S...
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
14 years 9 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...