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» On the Computational Complexity of Spatio-Temporal Logics
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DLOG
2009
14 years 8 months ago
Testing Provers on a Grid - Framework Description
Abstract. GridTest is a framework for testing automated theorem provers using randomly generated formulas. It can be used to run tests locally, in a single computer, or in a comput...
Carlos Areces, Daniel Gorín, Alejandra Lore...
85
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DAC
2004
ACM
16 years 6 hour ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
15 years 8 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 8 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
92
Voted
ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
15 years 4 months ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...