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ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 3 months ago
Circuit-level mismatch modelling and yield optimization for CMOS analog circuits
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
Mingjing Chen, Alex Orailoglu
ISCAS
2007
IEEE
178views Hardware» more  ISCAS 2007»
15 years 3 months ago
On the Joint Compensation of IQ Imbalances and Phase Noise in MIMO-OFDM Systems
Abstract— OFDM systems are susceptible to receiver impairments such as IQ imbalance and phase noise. These impairments can severely degrade the achievable effective signalto-nois...
Qiyue Zou, Alireza Tarighat, Ali H. Sayed
ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
15 years 2 months ago
Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
Sudip Chakrabarti, Abhijit Chatterjee
DAC
2009
ACM
15 years 10 months ago
Thermal-driven analog placement considering device matching
With the thermal effect, improper analog placements may degrade circuit performance because the thermal impact from power devices can affect electrical characteristics of the ther...
Po-Hung Lin, Hongbo Zhang, Martin D. F. Wong, Yao-...
AAAI
2004
14 years 11 months ago
Analogical Path Planning
We present a probabilistic method for path planning that considers trajectories constrained by both the environment and an ensemble of restrictions or preferences on preferred mot...
Saul Simhon, Gregory Dudek