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» On the Expressive Power of Deep Architectures
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92
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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 2 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
ICSE
1998
IEEE-ACM
15 years 1 months ago
Integrating Architecture Description Languages with a Standard Design Method
Software architecture descriptions are high-level models of software systems. Some researchers have proposed specialpurpose architectural notations that have a great deal of expre...
Jason E. Robbins, Nenad Medvidovic, David F. Redmi...
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
15 years 2 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
ASPDAC
1998
ACM
81views Hardware» more  ASPDAC 1998»
15 years 1 months ago
A Heuristic Algorithm to Design AND-OR-EXOR Three-Level Networks
—An AND-OR-EXOR network, where the output EXOR gate has only two inputs, is one of the simplest three-level architecture. This network realizes an EXOR of two sum-of-products exp...
Debatosh Debnath, Tsutomu Sasao
76
Voted
DAC
2006
ACM
15 years 10 months ago
Stochastic variational analysis of large power grids considering intra-die correlations
For statistical timing and power analysis that are very important problems in the sub-100nm technologies, stochastic analysis of power grids that characterizes the voltage fluctua...
Praveen Ghanta, Sarma B. K. Vrudhula, Sarvesh Bhar...