155 search results - page 4 / 31 » On the Expressive Power of Deep Architectures |
VLSID
2008
IEEE
15 years 4 months ago
2008
IEEE
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
108
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HOTI
2011
IEEE
13 years 9 months ago
2011
IEEE
Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power cons...
DATE
2010
IEEE
15 years 1 months ago
2010
IEEE
Deep Packet Inspection (DPI) involves searching a packet's header and payload against thousands of rules to detect possible attacks. The increase in Internet usage and growing...
ICCD
2002
IEEE
15 years 6 months ago
2002
IEEE
High performance SoC requires nonblocking interconnections between an array of processors built on one chip. With the advent of deep sub-micron technologies, switches are becoming...
102
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ANCS
2009
ACM
14 years 7 months ago
2009
ACM
Pattern matching is the most computation intensive task of a network intrusion detection system (NIDS). In this paper we present a hardware architecture to speed up the pattern mat...