488 search results - page 10 / 98 » On the Formal Generation of Process Redesigns |
111
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EURODAC
1994
IEEE
15 years 3 months ago
1994
IEEE
We outline a general methodology for the formal verification of pipeline conflicts in RISC cores. The different kinds of conflicts that can occur due to the simultaneous execution...
101
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TCS
2002
14 years 11 months ago
2002
We show how formal specifications can be integrated into one of the current pragmatic object-oriented software development methods. Jacobson's "Object-Oriented Software ...
FDL
2007
IEEE
15 years 3 months ago
2007
IEEE
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
FDL
2008
IEEE
15 years 1 months ago
2008
IEEE
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
AGTIVE
1999
Springer
15 years 4 months ago
1999
Springer
DiaGen is a specification method, which is primarily based on a hypergraph grammar, and a tool that allows to automatically generate diagram editors from such a specification. Ge...