488 search results - page 13 / 98 » On the Formal Generation of Process Redesigns |
ICSE
2000
IEEE-ACM
15 years 3 months ago
2000
IEEE-ACM
If a business built a plant to produce products without first designing a process to manufacture them, the risk would be lack of capacity without significant plant redesign. Simil...
129
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INLG
2010
Springer
14 years 9 months ago
2010
Springer
Critical software most often requires an independent validation and verification (IVV). IVV is usually performed by domain experts, who are not familiar with specific, many times ...
COMPSAC
2003
IEEE
15 years 5 months ago
2003
IEEE
RDT is a graphical formal modelling language in which the modeller works by constructing diagrams of the processes in their model which they then join together to form complete sy...
100
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RE
2002
Springer
14 years 11 months ago
2002
Springer
A limiting factor in the industrial acceptance of formal specifications is their readability, particularly for large, complex engineering systems. We hypothesize that multiple vis...
111
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RSP
2005
IEEE
15 years 5 months ago
2005
IEEE
Our software synthesis tool, CSP++, generates C++ source code from verifiable CSPm specifications, and includes a framework for runtime execution. Our technique of selective for...