488 search results - page 39 / 98 » On the Formal Generation of Process Redesigns |
101
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CSREAESA
2004
15 years 3 months ago
2004
In this paper we present an algorithm for automatic extraction of system behavior from a structural Verilog specification. The algorithm generates a series-parallel poset expressi...
121
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RAS
1998
15 years 1 months ago
1998
We present a formal model of negotiation between autonomous agents. The purpose of the negotiation is to reach an agreement about the provision of a service by one agent for anoth...
139
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FM
2009
Springer
14 years 11 months ago
2009
Springer
Abstract. This paper presents an iterative technique to accurately reverseengineer models of the behaviour of software systems. A key novelty of the approach is the fact that it us...
135
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DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
149
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ASE
2006
15 years 1 months ago
2006
User interface (UI) prototyping and scenario engineering have become popular techniques. Yet, the transition from scenario to formal specifications and the generation of UI code is...