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ACSD
2005
IEEE
144views Hardware» more  ACSD 2005»
15 years 10 months ago
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
AINA
2005
IEEE
15 years 10 months ago
Multi-Agent Based Network Management Task Decomposition and Scheduling
The rapid development of Internet makes network management on large-scale network a critical issue. But with the management task of large-scale network becoming more complicated, ...
Bo Liu, Junzhou Luo, Wei Li
ANSS
2005
IEEE
15 years 10 months ago
An Extensible Platform for Evaluating Security Protocols
We present a discrete-event network simulator, called Simnet, designed specifically for analyzing networksecurity protocols. The design and implementation is focused on simplicit...
Seny Kamara, Darren Davis, Lucas Ballard, Ryan Cau...
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
15 years 10 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
CCGRID
2005
IEEE
15 years 10 months ago
An incentives' mechanism promoting truthful feedback in peer-to-peer systems
We propose a mechanism for providing the incentives for reporting truthful feedback in a peer-to-peer system for exchanging services. This mechanism is to complement reputation me...
Thanasis G. Papaioannou, George D. Stamoulis
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