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» On the Inertia of the Asynchronous Circuits
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93
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ACSD
2007
IEEE
67views Hardware» more  ACSD 2007»
15 years 3 months ago
Hazard Checking of Timed Asynchronous Circuits Revisited
This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from statespace explosion...
Frédéric Béal, Tomohiro Yoned...
ICCAD
1997
IEEE
144views Hardware» more  ICCAD 1997»
15 years 1 months ago
Partial scan delay fault testing of asynchronous circuits
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
Michael Kishinevsky, Alex Kondratyev, Luciano Lava...
FORMATS
2006
Springer
15 years 1 months ago
Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata
Using a variant of Clariso-Cortadella's parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of so...
Remy Chevallier, Emmanuelle Encrenaz-Tiphèn...
ACSD
2006
IEEE
89views Hardware» more  ACSD 2006»
15 years 1 months ago
On process-algebraic verification of asynchronous circuits
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
Xu Wang, Marta Z. Kwiatkowska
75
Voted
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
15 years 1 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin