Sciweavers

235 search results - page 29 / 47
» On the Inertia of the Asynchronous Circuits
Sort
View
ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
15 years 8 months ago
An asynchronous delta-sigma converter implementation
— In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction ...
Dazhi Wei, Vaibhav Garg, John G. Harris
124
Voted
ASYNC
2000
IEEE
181views Hardware» more  ASYNC 2000»
15 years 6 months ago
Asynchronous Design Using Commercial HDL Synthesis Tools
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...
Michiel M. Ligthart, Karl Fant, Ross Smith, Alexan...
FPGA
2007
ACM
114views FPGA» more  FPGA 2007»
15 years 8 months ago
Design of a logic element for implementing an asynchronous FPGA
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
Scott C. Smith
ICCD
1999
IEEE
91views Hardware» more  ICCD 1999»
15 years 6 months ago
Architectural Synthesis of Timed Asynchronous Systems
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
Brandon M. Bachman, Hao Zheng, Chris J. Myers
DDECS
2009
IEEE
106views Hardware» more  DDECS 2009»
15 years 8 months ago
Forward and backward guarding in early output logic
—Quasi Delay Insensitive asynchronous logic is a very robust system allowing safe implementations while requiring minimal timing assumptions. Unfortunately the design methodologi...
Charlie Brej, Doug Edwards