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» On the Inertia of the Asynchronous Circuits
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IFIP
1999
Springer
15 years 4 months ago
A Synthesis Algorithm for Modular Design of Pipelined Circuits
: This paper presents a synthesis algorithm for pipelined circuits. The circuit is specified as a collection of independent, looselycoupled modules connected by queues. The synthe...
Maria-Cristina V. Marinescu, Martin C. Rinard
ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
15 years 8 months ago
Coping with The Variability of Combinational Logic Delays
Abstract— This paper proposes a technique for creating a combinational logic network with an output that signals when all other outputs have stabilized. The method is based on du...
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno...
ACSD
2009
IEEE
100views Hardware» more  ACSD 2009»
15 years 6 months ago
Scheduling Synchronous Elastic Designs
Asynchronous and latency-insensitive circuits offer a similar form of elasticity that tolerates variations in the delays of communication resources of a system. This flexibility ...
Josep Carmona, Jorge Júlvez, Jordi Cortadel...
ISCAS
2006
IEEE
111views Hardware» more  ISCAS 2006»
15 years 5 months ago
Spike response properties of an AER EAR
We present measured frequency-gain functions and the spike rate outputs of the different sections in a spiking silicon cochlea chip. The chip consists of a matched pair of silicon...
V. Chan, André van Schaik, Shih-Chii Liu
CONCUR
2001
Springer
15 years 4 months ago
Bounded Reachability Checking with Process Semantics
Bounded model checking has been recently introduced as an efficient verification method for reactive systems. In this work we apply bounded model checking to asynchronous systems....
Keijo Heljanko