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» On the Inertia of the Asynchronous Circuits
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VLSI
2005
Springer
15 years 3 months ago
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but...
Bertrand Folco, Vivian Brégier, Laurent Fes...
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
15 years 4 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
92
Voted
TVLSI
2010
14 years 4 months ago
Asynchronous Data-Driven Circuit Synthesis
A method is described for synthesizing asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than a control-driven, style. This approach...
Sam Taylor, Doug A. Edwards, Luis A. Plana, Luis A...
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
15 years 3 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
DATE
2005
IEEE
100views Hardware» more  DATE 2005»
15 years 3 months ago
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, F...