This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such ...
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
This paper describes a new target component set and synthesis scheme for the Balsa asynchronous hardware description language. This new scheme removes the reliance on precise hands...
Andrew Bardsley, Luis A. Tarazona, Doug A. Edwards
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...