235 search results - page 9 / 47 » On the Inertia of the Asynchronous Circuits |
68
Voted
ASYNC
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper addresses the issue of Single-Event Upset (SEU) in quasi delay-insensitive (QDI) asynchronous circuits. We show that an SEU can cause abnormal computations in QDI circu...
CORR
2004
Springer
14 years 9 months ago
2004
Springer
The notion of limit condition that we propose is a generalization of the delay condition [1], [2], including the models of the delay circuits, of the C elements of Muller and of t...
77
Voted
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
ASYNC
1999
IEEE
15 years 1 months ago
1999
IEEE
Noise immunity is becomingone of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the pr...
109
Voted
CDES
2010
14 years 7 months ago
2010
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...