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» On the Meaning of Logical Completeness
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ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
14 years 9 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
77
Voted
DAC
2005
ACM
15 years 12 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
94
Voted
WWW
2006
ACM
15 years 11 months ago
Symmetrically exploiting XML
Path expressions are the principal means of locating data in a hierarchical model. But path expressions are brittle because they often depend on the structure of data and break if...
Shuohao Zhang, Curtis E. Dyreson
ICLP
2009
Springer
15 years 11 months ago
Attributed Data for CHR Indexing
Abstract. The overhead of matching CHR rules is alleviated by constraint store indexing. Attributed variables provide an efficient means of indexing on logical variables. Existing ...
Beata Sarna-Starosta, Tom Schrijvers
74
Voted
VLSID
2004
IEEE
108views VLSI» more  VLSID 2004»
15 years 11 months ago
Boolean Decomposition Using Two-literal Divisors
This paper is an attempt to answer the following question: how much improvement can be obtained in logic decomposition by using Boolean divisors? Traditionally, the existence of t...
Nilesh Modi, Jordi Cortadella