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» On the Meaning of Logical Completeness
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VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
15 years 10 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
VLSID
2002
IEEE
87views VLSI» more  VLSID 2002»
15 years 10 months ago
Simultaneous Circuit Transformation and Routing
In this paper, we propose a new methodology to integrate circuit transformation into routing. More specifically, this paper shows an approach for performing routing and wire recon...
Hiroaki Yoshida, Motohiro Sera, Masao Kubo, Masahi...
POPL
2002
ACM
15 years 10 months ago
Towards automatic construction of staged compilers
Some compilation systems, such as offline partial evaluators and selective dynamic compilation systems, support staged optimizations. A staged optimization is one where a logicall...
Matthai Philipose, Craig Chambers, Susan J. Eggers
CADE
2005
Springer
15 years 10 months ago
The Decidability of the First-Order Theory of Knuth-Bendix Order
Two kinds of orderings are widely used in term rewriting and theorem proving, namely recursive path ordering (RPO) and Knuth-Bendix ordering (KBO). They provide powerful tools to p...
Ting Zhang, Henny B. Sipma, Zohar Manna
CADE
2002
Springer
15 years 10 months ago
Basic Syntactic Mutation
Modularity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Michael Abbott, Neil Ghani, and Christoph L?uth Union of Equational Theo...
Christopher Lynch, Barbara Morawska