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» On the Number of Minimal Addition Chains
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66
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DSD
2004
IEEE
104views Hardware» more  DSD 2004»
15 years 1 months ago
A Static Low-Power, High-Performance 32-bit Carry Skip Adder
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
Kai Chirca, Michael J. Schulte, John Glossner, Hao...
80
Voted
FPGA
2008
ACM
155views FPGA» more  FPGA 2008»
14 years 11 months ago
A novel FPGA logic block for improved arithmetic performance
To improve FPGA performance for arithmetic circuits, this paper proposes a new architecture for FPGA logic cells that includes a 6:2 compressor. The new cell features additional f...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
IPPS
2006
IEEE
15 years 3 months ago
Memory minimization for tensor contractions using integer linear programming
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sad...
CSDA
2010
208views more  CSDA 2010»
14 years 9 months ago
Bayesian density estimation and model selection using nonparametric hierarchical mixtures
We consider mixtures of parametric densities on the positive reals with a normalized generalized gamma process (Brix, 1999) as mixing measure. This class of mixtures encompasses t...
Raffaele Argiento, Alessandra Guglielmi, Antonio P...
108
Voted
CDC
2008
IEEE
145views Control Systems» more  CDC 2008»
14 years 9 months ago
Necessary and sufficient conditions for success of the nuclear norm heuristic for rank minimization
Minimizing the rank of a matrix subject to constraints is a challenging problem that arises in many applications in control theory, machine learning, and discrete geometry. This c...
Benjamin Recht, Weiyu Xu, Babak Hassibi