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» On the Number of Minimal Addition Chains
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MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 1 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi
ISCA
1999
IEEE
90views Hardware» more  ISCA 1999»
15 years 2 months ago
Selective Value Prediction
Value Prediction is a relatively new technique to increase instruction-level parallelism by breaking true data dependence chains. A value prediction architecture produces values, ...
Brad Calder, Glenn Reinman, Dean M. Tullsen
JSAC
2007
115views more  JSAC 2007»
14 years 9 months ago
Energy aware power allocation strategies for multihop-cooperative transmission schemes
Abstract— This paper deals with a cooperative decoded relaying scheme in multihop wireless network and the corresponding transmitters power allocation strategies for nodes belong...
Stefano Savazzi, Umberto Spagnolini
TCS
2008
14 years 9 months ago
Sequential and parallel triangulating algorithms for Elimination Game and new insights on Minimum Degree
1 Elimination Game is a well known algorithm that simulates Gaussian elimination of matrices on graphs, and it computes a triangulation of the input graph. The number of fill edge...
Anne Berry, Elias Dahlhaus, Pinar Heggernes, Genev...
73
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ICSE
2009
IEEE-ACM
15 years 4 months ago
Deployment automation with BLITZ
Minimizing the computing infrastructure (such as processors) in a distributed real-time embedded (DRE) system deployment helps reduce system size, weight, power consumption, and c...
Brian Dougherty, Jules White, Jaiganesh Balasubram...