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ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
15 years 1 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
CGO
2003
IEEE
15 years 1 months ago
Optimal and Efficient Speculation-Based Partial Redundancy Elimination
Existing profile-guided partial redundancy elimination (PRE) methods use speculation to enable the removal of partial redundancies along more frequently executed paths at the expe...
Qiong Cai, Jingling Xue
PDPTA
2004
14 years 11 months ago
Efficient Disk Replacement and Data Migration Algorithms for Large Disk Subsystems
Random data placement has recently emerged as an alternative to traditional data striping. From a performance perspective, it has been demonstrated to be an efficient and scalable...
Roger Zimmermann, Beomjoo Seo
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 3 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
JMLR
2006
96views more  JMLR 2006»
14 years 9 months ago
A Hierarchy of Support Vector Machines for Pattern Detection
We introduce a computational design for pattern detection based on a tree-structured network of support vector machines (SVMs). An SVM is associated with each cell in a recursive ...
Hichem Sahbi, Donald Geman