As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Abstract—In order to achieve data delivery in Delay Tolerant Networks (DTN), researchers have proposed the use of store-carryand-forward protocols: a node there may store a messa...
Amir Krifa, Chadi Barakat, Thrasyvoulos Spyropoulo...
Measurement and estimation of packet loss characteristics are challenging due to the relatively rare occurrence and typically short duration of packet loss episodes. While active ...
Joel Sommers, Paul Barford, Nick G. Duffield, Amos...