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» On the Practical Performance of Rateless Codes
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ISPASS
2009
IEEE
15 years 4 months ago
WARP: Enabling fast CPU scheduler development and evaluation
Abstract—Developing CPU scheduling algorithms and understanding their impact in practice can be difficult and time consuming due to the need to modify and test operating system ...
Haoqiang Zheng, Jason Nieh
LCTRTS
2004
Springer
15 years 3 months ago
A trace-based binary compilation framework for energy-aware computing
Energy-aware compilers are becoming increasingly important for embedded systems due to the need to meet conflicting constraints on time, code size and power consumption. We intro...
Lian Li 0002, Jingling Xue
PPPJ
2009
ACM
15 years 4 months ago
Phase detection using trace compilation
Dynamic compilers can optimize application code specifically for observed code behavior. Such behavior does not have to be stable across the entire program execution to be bene...
Christian Wimmer, Marcelo Silva Cintra, Michael Be...
IPPS
2006
IEEE
15 years 4 months ago
Algorithm-based checkpoint-free fault tolerance for parallel matrix computations on volatile resources
As the desire of scientists to perform ever larger computations drives the size of today’s high performance computers from hundreds, to thousands, and even tens of thousands of ...
Zizhong Chen, Jack Dongarra
ICIP
2006
IEEE
15 years 11 months ago
Dependency Channel Modeling for a LDPC-Based Wyner-Ziv Video Compression Scheme
Research in distributed video coding for low complexity encoding has shown that without knowledge of the correlation between source and side information (i.e. the behavior of the ...
Ronald P. Westerlaken, Stefan Borchert, Rene Klein...