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FPT
2005
IEEE
134views Hardware» more  FPT 2005»
15 years 3 months ago
Post-Silicon Debug Using Programmable Logic Cores
Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabr...
Bradley R. Quinton, Steven J. E. Wilton
88
Voted
HPCC
2005
Springer
15 years 3 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
HPDC
1996
IEEE
15 years 1 months ago
The Core Legion Object Model
This document describes the core Legion object model. The model specifies the composition and functionality of Legion's core objects--those objects that cooperate to create, ...
Michael J. Lewis, Andrew S. Grimshaw
APSEC
2004
IEEE
15 years 1 months ago
A Systematic Method to Instantiate Core Assets in Product Line Engineering
Product line engineering (PLE) is one of the recent and effective reuse approaches, and it consists of two processes; framework engineering and application engineering. Framework ...
Soo Dong Kim, Soo Ho Chang, Chee Won Chang
ENTCS
2002
95views more  ENTCS 2002»
14 years 9 months ago
A Proof Dedicated Meta-Language
We describe a proof dedicated meta-language, called Ltac, in the context of the Coq proof assistant. This new layer of meta-language is quite appropriate to write small and local ...
David Delahaye