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» On the Superdistribution of Digital Goods
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VTS
2002
IEEE
108views Hardware» more  VTS 2002»
15 years 6 months ago
On Using Efficient Test Sequences for BIST
High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single Inp...
René David, Patrick Girard, Christian Landr...
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
15 years 5 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen
DATE
2009
IEEE
118views Hardware» more  DATE 2009»
15 years 5 months ago
Variation resilient adaptive controller for subthreshold circuits
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption...
Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolin...
DAGM
2006
Springer
15 years 5 months ago
Provably Correct Edgel Linking and Subpixel Boundary Reconstruction
Existing methods for segmentation by edgel linking are based on heuristics and give no guarantee for a topologically correct result. In this paper, we propose an edgel linking algo...
Ullrich Köthe, Peer Stelldinger, Hans Meine
ESANN
2006
15 years 3 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout