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» On the Termination of the Chase Algorithm
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96
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FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
15 years 1 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna
127
Voted
TABLEAUX
2000
Springer
15 years 1 months ago
Benchmark Analysis with FaCT
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
Ian Horrocks
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
15 years 1 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
COCOON
2008
Springer
14 years 12 months ago
Approximating the Generalized Capacitated Tree-Routing Problem
In this paper, we introduce the generalized capacitated tree-routing problem (GCTR), which is described as follows. Given a connected graph G = (V, E) with a sink s V and a set M...
Ehab Morsy, Hiroshi Nagamochi
JMLR
2002
111views more  JMLR 2002»
14 years 9 months ago
The Learning-Curve Sampling Method Applied to Model-Based Clustering
We examine the learning-curve sampling method, an approach for applying machinelearning algorithms to large data sets. The approach is based on the observation that the computatio...
Christopher Meek, Bo Thiesson, David Heckerman