3742 search results - page 21 / 749 » On the Use of Formal Techniques for Validation |
102
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ACL
2011
14 years 3 months ago
2011
A system making optimal use of available information in incremental language comprehension might be expected to use linguistic knowledge together with current input to revise beli...
DAC
1999
ACM
15 years 4 months ago
1999
ACM
Abstract We describe the use of parametric representations of Boolean predicates to encode data-space constraints and signi cantly extend the capacity of formal veri cation. The co...
FMCAD
2008
Springer
15 years 1 months ago
2008
Springer
We present a general approach for verifying safety properties of Lustre programs automatically. Key aspects of the approach are the choice of an expressive first-order logic in wh...
74
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WDAG
2007
Springer
15 years 5 months ago
2007
Springer
The deferred update technique is a widely used approach for building replicated database systems. Its fame stems from the fact that read-only transactions can execute locally to a...
116
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DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...