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» On the Use of Formal Techniques for Validation
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FM
2005
Springer
98views Formal Methods» more  FM 2005»
15 years 5 months ago
Retrenching the Purse: Finite Sequence Numbers, and the Tower Pattern
The Mondex Electronic Purse system [18] is an outstanding example of formal refinement techniques applied to a genuine industrial scale application, and notably, was the first ve...
Richard Banach, Michael Poppleton, Czeslaw Jeske, ...
AMAST
2006
Springer
15 years 3 months ago
Formal Islands
Abstract. Motivated by the proliferation and usefulness of Domain Specific Languages as well as the demand in enriching well established languages by high level capabilities like p...
Emilie Balland, Claude Kirchner, Pierre-Etienne Mo...
PATAT
1997
Springer
107views Education» more  PATAT 1997»
15 years 4 months ago
A Comparison of Annealing Techniques for Academic Course Scheduling
In this study we have tackled the NP-hard problem of academic class scheduling (or timetabling) at the university level. We have investigated a variety of approaches based on simu...
M. A. Saleh Elmohamed, Paul D. Coddington, Geoffre...
SEKE
2010
Springer
14 years 9 months ago
Specification patterns can be formal and still easy
Abstract--Property specification is still one of the most challenging tasks for transference of software verification technology like model checking. The use of patterns has been p...
Fernando Asteasuain, Víctor A. Braberman
VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
16 years 12 days ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen