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» On the Use of Formal Techniques for Validation
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CASES
2010
ACM
14 years 9 months ago
Low cost multicast authentication via validity voting in time-triggered embedded control networks
Wired embedded networks must include multicast authentication to prevent masquerade attacks within the network. However, unique constraints for these networks make most existing m...
Christopher Szilagyi, Philip Koopman
MEMOCODE
2005
IEEE
15 years 5 months ago
Three-valued logic in bounded model checking
In principle, bounded model checking (BMC) leads to semidecision procedures that can be used to verify liveness properties and to falsify safety properties. If the procedures fail...
Tobias Schüle, Klaus Schneider
CORR
2008
Springer
179views Education» more  CORR 2008»
14 years 12 months ago
Practical Automated Partial Verification of Multi-Paradigm Real-Time Models
This article introduces a fully automated verification technique that permits to analyze real-time systems described using a continuous notion of time and a mixture of operational...
Carlo A. Furia, Matteo Pradella, Matteo Rossi
EUROMICRO
2000
IEEE
15 years 4 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
ESCIENCE
2007
IEEE
15 years 3 months ago
Formal Modeling and Analysis of Scientific Workflows Using Hierarchical State Machines
Scientific workflows have recently emerged as a new paradigm for representing and managing complex distributed scientific computations and data analysis, and have enabled and acce...
Ping Yang, Zijiang Yang, Shiyong Lu