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ACISP
2008
Springer
15 years 4 months ago
Collisions for Round-Reduced LAKE
LAKE is a family of cryptographic hash functions presented at FSE 2008. It is an iterated hash function and defines two main instances with a 256 bit and 512 bit hash value. In th...
Florian Mendel, Martin Schläffer
VTS
2007
IEEE
143views Hardware» more  VTS 2007»
15 years 4 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang
ICPPW
2000
IEEE
15 years 2 months ago
Reducing Web Latency with Hierarchical Cache-Based Prefetching
Proxy caches have become a central mechanism for reducing the latency of web document retrieval. While caching alone reduces latency for previously requested documents, web docume...
Dan Foygel, Dennis Strelow
ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
15 years 2 months ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...
JCP
2007
181views more  JCP 2007»
14 years 9 months ago
Reducing Energy Consumption of Wireless Sensor Networks through Processor Optimizations
When the environmental conditions are stable, a typical Wireless Sensor Network (WSN) application may sense and process very similar or constant data values for long durations. Thi...
Gürhan Küçük, Can Basaran