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ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
15 years 10 months ago
The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
M. S. Hrishikesh, Doug Burger, Stephen W. Keckler,...
CONCUR
2000
Springer
15 years 9 months ago
LP Deadlock Checking Using Partial Order Dependencies
Model checking based on the causal partial order semantics of Petri nets is an approach widely applied to cope with the state space explosion problem. One of the ways to exploit su...
Victor Khomenko, Maciej Koutny
162
Voted
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
15 years 8 months ago
Optimizations of an application-level protocol for enhanced dependability in FlexRay
FlexRay [9] is an automotive standard for high-speed and reliable communication that is being widely deployed for next generation cars. The protocol has powerful errordetection me...
Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Gius...
ISAAC
2010
Springer
253views Algorithms» more  ISAAC 2010»
15 years 2 months ago
Solving Two-Stage Stochastic Steiner Tree Problems by Two-Stage Branch-and-Cut
Abstract. We consider the Steiner tree problem under a 2-stage stochastic model with recourse and finitely many scenarios (SSTP). Thereby, edges are purchased in the first stage wh...
Immanuel M. Bomze, Markus Chimani, Michael Jü...
SJ
2010
136views more  SJ 2010»
14 years 11 months ago
Optimizing the Migration to Future-Generation Passive Optical Networks (PON)
We study the upgrading problem of existing Passive Optical Networks (PONs) that need to increase their capacity at different points in time. Our method upgrades line rates and migr...
M. De Andrade, Massimo Tornatore, S. Sallent, Bisw...