We study the complexity of satisfiability for DLP+ dyn , an expressive logic introduced by Demri that allows to reason about dynamic policies. DLP+ dyn extends the logic DLPdyn of...
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
Subbarao Palacharla, Norman P. Jouppi, James E. Sm...