2035 search results - page 347 / 407 » On the complexity of stratified logics |
94
Voted
ACSC
2004
IEEE
15 years 2 months ago
2004
IEEE
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
ATVA
2004
Springer
15 years 2 months ago
2004
Springer
While model checking suffers from the state space explosion problem, theorem proving is quite tedious and impractical for verifying complex designs. In this work, we present a veri...
86
Voted
ATVA
2006
Springer
15 years 2 months ago
2006
Springer
In synthesis we construct finite state systems from temporal specifications. While this problem is well understood in the classical setting of non-probabilistic synthesis, this pap...
116
Voted
DAC
2004
ACM
15 years 2 months ago
2004
ACM
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
101
click to vote
DAC
2004
ACM
15 years 2 months ago
2004
ACM
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...