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DAC
2000
ACM
15 years 11 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
DAC
2001
ACM
15 years 11 months ago
Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods
In this paper, we propose preconditioned Krylov-subspace iterative methods to perform efficient DC and transient simulations for large-scale linear circuits with an emphasis on po...
Tsung-Hao Chen, Charlie Chung-Ping Chen
DAC
2001
ACM
15 years 11 months ago
Dynamic Voltage Scaling and Power Management for Portable Systems
Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor sp...
Tajana Simunic, Luca Benini, Andrea Acquaviva, Pet...
DAC
2004
ACM
15 years 11 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
DAC
2005
ACM
15 years 11 months ago
Low power network processor design using clock gating
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...
Jia Yu, Jun Yang 0002, Laxmi N. Bhuyan, Yan Luo