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» On the energy-efficiency of speculative hardware
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111
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ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
15 years 4 months ago
Speculation Techniques for Improving Load Related Instruction Scheduling
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-oforder engine, the instruction scheduler is responsible for disp...
Adi Yoaz, Mattan Erez, Ronny Ronen, Stéphan...
129
Voted
SPAA
2009
ACM
16 years 1 months ago
A lightweight in-place implementation for software thread-level speculation
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
Cosmin E. Oancea, Alan Mycroft, Tim Harris
ICPPW
2005
IEEE
15 years 6 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
96
Voted
RAID
2009
Springer
15 years 7 months ago
Multi-byte Regular Expression Matching with Speculation
Intrusion prevention systems determine whether incoming traffic matches a database of signatures, where each signature in the database represents an attack or a vulnerability. IPSs...
Daniel Luchaup, Randy Smith, Cristian Estan, Somes...
99
Voted
SBACPAD
2004
IEEE
105views Hardware» more  SBACPAD 2004»
15 years 1 months ago
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes br...
Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale ...