415 search results - page 29 / 83 » On the energy-efficiency of speculative hardware |
105
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DATE
2003
IEEE
15 years 5 months ago
2003
IEEE
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
ISCA
2002
IEEE
15 years 5 months ago
2002
IEEE
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...
94
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ICCD
2003
IEEE
15 years 9 months ago
2003
IEEE
We analyze the effect of errors in branch predictors, a representative example of speculative processor subsystems, to motivate the necessity for fault tolerance in such subsystem...
JPDC
2006
15 years 12 days ago
2006
Speculative pre-execution achieves efficient data prefetching by running additional prefetching threads on spare hardware contexts. Various implementations for speculative pre-exe...
89
Voted
ISCA
2006
IEEE
15 years 6 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...