415 search results - page 42 / 83 » On the energy-efficiency of speculative hardware |
134
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LCPC
2005
Springer
15 years 6 months ago
2005
Springer
Thread level speculation (TLS) has shown great promise as a strategy for fine to medium grain automatic parallelisation, and in a hardware context techniques to ensure correct TLS...
107
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CF
2007
ACM
15 years 4 months ago
2007
ACM
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
93
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IEEEPACT
2005
IEEE
15 years 6 months ago
2005
IEEE
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
ICPPW
2009
IEEE
15 years 7 months ago
2009
IEEE
Abstract— The migration away from power-hungry, speculative execution procesors towards manycore architectures is good news for the embedded and real-time systems community. Comm...
91
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ASPLOS
2008
ACM
15 years 2 months ago
2008
ACM
Speck1 is a system that accelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. Speck provides an infrastructure that allows se...